1. The first instruction of COM file must be at offset:

• 0x0010
• 0x0100 ✔
• 0x1000
• 0x0000

2. The iAPX88 architecture consists of ___ registers.

• 12
• 14 ✔
• 16
• 18

3. When two 16-bit numbers are added the answer can be 17 bits long, this extra bit that won’t fit in the target register is placed in the where it can be used and tested.

• Carry flag ✔
• parity flag
• auxiliary carry
• zero flag

4. Only instruction allow moving data from memory to memory

• string ✔
• word
• indirect
• stack

5. Allow changing specific processor behaviors and are used to play with it.

• Special instructions ✔
• data movement instructions
• program control instructions
• arithmetic and logic instructions

6. 8088 is a 16-bit processor with its accumulator and all registers of ___.

• 32 bits
• 6 bits
• 16 bits ✔
• 8 bits

7. In the instruction cmp ax,bx the contents of ___ are changed.

• ax
• bx
• cx
• flag register ✔

8. All the addressing mechanisms in iAPX88 return a number called ___ address.

• Effective ✔
• Faulty
• indirect
• direct

9. Mov byte[num1],5 is ___ instruction.

• Legal ✔
• illegal
• stack-based
• memory indirect

10. The memory address always moves from

• processor to memory ✔
• memory to processor
• memory to peripheral
• peripheral to processor

11. An offset alone is not complete without

• segment ✔
• code label
• index register
• data label

12. Code segment is associated to ___ register by default.

• IP ✔
• SS
• BP
• CX

13. The iAPX88 processor supports ___ modes of memory access.

• 5
• 6
• 7 ✔
• 8

14. A 32-bit processor has accumulator of ___

• 8 bits
• 16 bits
• 32 bits ✔
• 64 bits

15. After execution of JCXZ instruction CX will changed with flag affect.

• CF
• OF
• DF
• None ✔

16. Far jump is not position relative but is ___ memory

• dependent
• absolute ✔
• temporary
• indirect

17. If the address of memory location num1 is 0117 and its content is 0005 then after execution of the instruction mov bx, num1 bx will contain.

• 0005 ✔
• 0117
• num1
• 1701

18. Assembly the cx register is used normally as a ___ register.

• Source
• counter ✔
• index
• pointer

19. Which is the unidirectional bus?

• Control bus
• data bus
• address bus ✔
• none

20. ___ register holds the address of next instruction is to be executed

• base pointer
• code segment
• source index
• program counter ✔

21. JC and JNC test the __

• equal
• carry flag ✔
• parity
• zero sign

22. Which bit sets the character ‘’blinking’’ on the screen?

• 5
• 6
• 7 ✔
• 8

23. Mov ax, 5 has:

• 1 operand
• 2 operands ✔
• 3 operands
• 4 operands

24. Index registers are used to store ___.

• data
• intermediate result
• address ✔
• both data and address

25. The bits of the ___ work independently and individually.

• Index register
• base register
• flags register ✔
• accumulator

26. The operation of CMP is to:

• subtract source from destination ✔
• subtract destination from source
• add 1 to the destination
• add source and destination

27. The registers IP, SP, BP, SI, DI and BX all can contain a ___ offset.

• 8 bits
• 16 bits ✔
• 32 bits
• 64 bits

28. Regarding assembler, which statement is true:

• assembler converts mnemonics to the corresponding OPCODE ✔
• assembler converts OPCODE to the corresponding mnemonics
• assembler executes the assembly code all at once
• assembler executes the assembly code step by step

29. If BB is the OPCODE of the instruction which states to “move a constant value to ax register”, the hexadecimal representation (using little Endian notation) of the instruction mov ax, 336 (150 in hexadecimal number system) will be:

• 0XBB0150 ✔
• 0X5001BB
• 0X01BB50
• 0XBB5001

30. Assembly language is:

• low level programming language ✔
• high level programming language
• also known as machine language
• not considered closer to the computer

31. There are ___ registers in iapx88 architecture that can hold address of data.

• 1
• 2
• 3
• 4 ✔

32. Which part of this B80500 encoded instruction is an opcode?

• Opcode is 0500
• opcode is B80500
• opcode is B8 ✔
• opcode is 05

33. In ___ operation the carry flag is inserted from the right causing every bit to move one location to its left and the most significant bit occupying the carry flag.

• Rotate through carry right(RCR)
• Rotate through carry left(RCL) ✔
• Rotate left (ROL)
• Rotate right (ROR)

34. In ___ operation, a carry flag is inserted from the left moving every bit one position to the right, with the right most bit is dropped in the carry flag.

• RCR ✔
• ROL
• RCL
• ROR

35. CS and IP are both ___ bit registers.

• 8
• 4
• 16 ✔
• 32

36. Motorola follows ___.

• big endian ✔
• little endian
• both
• None

37. Intel follows ___.

• Little endian ✔
• big endian
• both
• None

38. The shift logical right operation inserts.

• A zero from right
• a zero from left ✔
• a one from right
• a one from left

39. Shifting the -15 two-bit SAR:

• -7 ✔
• 7
• -8
• 8

40. In left shift operation the most left bit___

• will drop
• will go to CF ✔
• will come to the right most
• will be always 1

41. To reserve 8-bits in memory ___ directive is used.

• db ✔
• dw
• dn
• dd

42. In the mov ax, 5 5 is the ___ operand.

• source ✔
• destination
• memory
• register

43. Which flags are not used for mathematical operations?

• Carry, interrupt and trap flag
• direction, interrupt and trap flag ✔
• direction, overflow and trap flag
• direction, interrupt and sign flag

44. The number of bits required to access 1MB of memory are

• 16 bits
• 20 bits ✔
• 32 bits
• depends on the processor architecture

45. cx register is:

• count register ✔
• data register
• index register
• base register

46. Which of the following is not true about registers?

• their operation is very much like memory
• intermediate results may also be stored in registers ✔
• they are also called scratch pad ram
• none

47. Types of jump are:

• short, near
• short, near, far ✔
• near, far short, far

48. 8088 is a __ bit processor.

• 8
• 16 ✔
• 32
• 64

49. |0|→|1|1|0|1|0|0|0|→|C| is an example of:

• SHL
• SHR ✔
• SAR
• SAL

50. Memory is determined by ____ pair and not alone.

• Segment-offset ✔
• segment-code
• offset-code
• offset addressing

51. In rotate right operation every bit moves one position to the right and the bit dropped from the right is inserted at the left and:

• dropped in CF
• moves to AL
• don’t go anywhere
• none

52. There are three buses to communicate the processor and memory named as:

• address, line, data bus
• address, control, line bus
• address, control, data bus
• none

53. The address bus is unidirectional and address always travel from processor to memory.

• True
• False

54. Data bus is bidirectional because:

• to way
• data moves from both: processor to memory and memory to processor
• data moves from both: processor to memory and memory to data bus
• none

55. Control bus:

• is one way
• unidirectional
• bidirectional
• none

56. A memory cell is an n-bit location to store data, normally ___ also called a byte.

• 4-bit
• 8-bit
• 16-bit
• 32-bit

57. The number of bits in a cell is called the cell width. ___ define the memory completely.

• Cell width and number of cells
• cell number
• width
• height

58. For memory we define two dimensions. The first dimension defines how many ___ bits are there in a single memory cell.

• Parallel
• vertical
• long
• short

59. if ax contains decimal -2 and bx contains decimal 2 then after the execution of the instruction: cmp ax, bx JA label

• Jump will be taken
• zero flag will set
• ZF will contain value 4
• Jump will not be taken

60. If D is 35 is shift to left 2 bits the new value:

• 35
• 70
• 140
• 17

61. In general, the memory cell cannot be wider than the width of the data bus.

• True
• False

62. ___ bus carries the intent of the processor that it wants to read or to write.

• Control
• Address
• Data
• Both control and data

63. The responsibility of sending the appropriate signals on the control bus to the memory is of the ___.

• Control Bus
• Peripherals
• Processor
• Memory

64. There are temporary storage places inside the processor called ___.

• Memories
• registers
• peripherals
• none

65. We can have precisely ___ address on the address bus and consequently precisely ___ element on the data bus.

• one, one
• one, two
• two, one
• two, two

66. Traditionally all mathematical and logical operations are performed on the ___.

• Processor
• register
• Accumulator
• None

67. Whenever we need access to a memory location whose address is not known until run-time we need an ___ register.

• Index
• Flag
• accumulator
• none

68. The instruction cli clears the ___ flag.

• Interrupt
• overflow
• direction
• carry

69. The instruction sti sets the ___ flag.

• Carry
• interrupt
• parity
• overflow

70. iAPX88 stands for:

• “Intel Advanced Processor Extensions 88”

71. iAPX386 is a ___ bit processor.

• 8
• 16
• 32
• 64

72. First processor 8080 was ___ bit processor.

• 8
• 16
• 32
• 64

73. The A of AX register stands for: Accumulator
74. The B of BX register stands for: Base
75. The C of CX register stands for: Counter
76. The D of DX register stands for: Destination
77. SI and DI are 16-bit and cannot be used as 8-bit register pairs like ax, bx, cx and dx.

• True
• False

78. Which of the following is true about Parity?

• Parity is the number of “one” bits in a binary number
• Parity is either odd or even
• Both a and b
• none

79. The collection of 4-bits is called.

• Word
• nibble
• byte
• none

80. During addition or subtraction if a carry goes from one nibble to the next which flag is set?

• Auxiliary
• carry
• trap
• parity

81. Which flag is set if the last mathematical or logical instruction has produced a zero in its destination.

• Carry
• parity
• direction
• zero

82. To start a comment ___ is used in assembly.

• Colon (:)
• hyphen (-)
• semicolon (;)
• asterisk (*)

83. The process through which the segment register can be explicitly specified is known as:

• segment addressing
• segment override prefix
• segment indexing
• offset indexing

84. If BL contains 00000101 then after a single right shift. BL will contain:

• 00000011
• 00000010
• 10000011
• 10000010

85. In assembly language JNZ is used to:

• jump if the zero flag is not set
• jump if the zero flag is set
• jump if the sign flag is set
• jump if the sign flag is not set

86. SP is associated (by default) with:

• DS
• SS
• ES
• CS

87. The stack pointer contains the address of the word that is currently on ___.

• Top of the stack
• down of the stack
• top and down both
• any position in the stack

88. Which one of the following is an illegal instruction?

• Mov ax, bx
• Mov ax, 65
• Mov ax, [bx+bp]
• Mov bx, 10