1. Assume a logical address space of 16 pages of 1024 words, each mapped into a physical memory of 32 frames, Each word consists of 2 bytes. What will be the total number of bits required for p (page number)?
- 4 bits ✔
- 8 bits
- 16 bits
- 32 bits
2. ___ algorithm is used in Deadlock avoidance.
- Bakery
- Banker’s
- Mutual exclusion
- Safe Sequence ✔
3. Assume a logical address space of 16 pages of 1024 words, each mapped into a physical memory of 32 frames. Each word consists of 2 bytes. What will be the total number of bits required for f (frames)?
- 5 ✔
- 6
- 7
- 8
4. Access of variable Semaphore is possible only through two atomic operation ___ and ___.
- TestAndSet, Swap
- Lock, key
- Boolean, integer
- Wait, signal ✔
5. If a system is not in a safe state, there can be NO deadlocks.
- True
- False ✔
6. Address binding will be ___ in Multiprogramming with Variable Tasks (MVT)
- Dynamic ✔
- Static
- Variable
- Fixed
7. The ___ requires that one a writer is ready, that the writer performs its write as soon as possible. In other words, if a writer is waiting to access the object, no new readers may start reading.
- first readers-writers problem
- second readers-writers problem ✔
- third readers-writers problem
- fourth readers-writers problem
8. In ___ technique, memory is divided into several fixed-size partitions.
- Swapping
- Overlays
- Multiprogramming with Fixed Tasks (MFT) ✔
- Multiprogramming with Variable Tasks (MVT)
9. The problem of deadlocks can be solved by ___ method(s).
- Deadlock prevention
- Deadlock avoidance
- Allowing deadlock to occur, then detect and recover
- All of the given ✔
10. ___ is caused due to un-used space in fixed-size blocks/pages.
- Internal fragmentation ✔
- External fragmentation
- Paging
- MVT
11. It is not possible to run a program whose size is greater than the size of the main memory.
- True
- False
12. How does a logical-address space is represented?
- Through Critical section
- Through segments
13. ___ is the separation of user logical memory from physical memory.
- ROM
- Physical memory
- Virtual memory
- None
14. A ___ system is similar to paging system with swapping.
- Context switching
- Demand paging
- Page fault
- None
15. Each page is a power of ___ bytes long in paging scheme.
- 2
- 3
- 4
- 5
16. Segmentation is a memory management scheme that supports ___?
- Programmer’s view memory
- System’s view of memory
- Hardware view of memory
- None
17. ___ keep in memory only those instructions and data that are needed at any given time.
- Fragmentation
- Paging
- Swapping
- Overlays
18. The collection of processes that is waiting on the disk to be bought into the memory for execution forms the ___
- Input queue
- Output queue
- Both input and output queue
- None
19. Following schemes allow efficient implementations of page tables EXCEPT
- Hashed Page Table
- Hierarchical/Multilevel Paging
- Inverted Page Table
- Binary Page Table
20. Overlays are implemented by the ___
- Operating system
- Programmer
- Kernel
- Shell
21. A page table needed for keeping track of pages of the page table is called ___
- 2-level paging
- Page Directory
- Page size
- Page table size
22. The segment table maps the ___ to physical addresses.
- Page addresses
- Shared page addresses
- One-dimensional logical addresses
- Two-dimensional logical addresses
23. What do we name to an address that is generated by the CPU?
- Logical address
- Physical address
- Binary address
- None
24. Intel is basically designed for following Operating Systems except ___
- MULTICS
- OS/2
- Windows
- Linux
25. ___ holds the smallest legal physical memory address for a process.
- Base register
- Limit register
- Index register
- Stack pointers register
26. ___ register contains the size of the process.
- Base register
- Index register
- Limit register
- Stack pointers register
27. Intel 80386 used paged segmentation with ___ level paging.
- One
- Two
- Three
- Four
28. In pages segmentation, the logical addresses is legal if d is ___ segment length.
- Less than
- Greater than
- Equal to
- Greater than or equal to
